1 Introduction
2 ------------
3
4 The VGAPIC32 project provides software and circuit information to generate an
5 analogue VGA signal from a PIC32 microcontroller. More details can be found in
6 the following article:
7
8 http://blogs.fsfe.org/pboddie/?p=1712
9
10 See also the docs directory for original versions of the different explanatory
11 diagrams.
12
13 Contact, Copyright and Licence Information
14 ------------------------------------------
15
16 The author can be contacted at the following e-mail address:
17
18 paul@boddie.org.uk
19
20 Copyright and licence information can be found in the docs directory - see
21 docs/COPYING.txt and docs/gpl-3.0.txt for more information.
22
23
24
25 Hardware Details
26 ================
27
28 The pin usage of this solution is documented below.
29
30 PIC32MX270F256B-50I/SP Pin Assignments
31 --------------------------------------
32
33 MCLR# 1 \/ 28
34 HSYNC/OC1/RA0 2 27
35 VSYNC/OC2/RA1 3 26 RB15
36 D0/RB0 4 25 RB14
37 D1/RB1 5 24 RB13
38 D2/RB2 6 23
39 D3/RB3 7 22 RB11/PGEC2
40 8 21 RB10/PGEC3
41 REFCLKO/RA2 9 20
42 RA3 10 19
43 D4/RB4 11 18 RB9
44 12 17 RB8
45 13 16 RB7/D7
46 D5/RB5 14 15
47
48 Note that RB6 is not available on pin 15 on this device.
49
50 Clock Output Routing
51 --------------------
52
53 REFCLKO is used to drive a 74HC273 flip-flop clock pulse (CP) input, with the
54 data signals then routed through the flip-flop as follows:
55
56 MR# 1 \/ 20 VCC
57 out D0/Q0 2 19 Q7/D7 out
58 in D0/D0 3 18 D7/D7 in
59 in D1/D1 4 17 D6
60 out D1/Q1 5 16 Q6
61 out D2/Q2 6 15 Q5/D5 out
62 in D2/D2 7 14 D5/D5 in
63 in D3/D3 8 13 D4/D4 in
64 out D3/Q3 9 12 Q4/D4 out
65 GND 10 11 CP/REFCLKO in
66
67 MR# is kept at a high level. All out signals are then supplied to the
68 analogue circuit provided below.
69
70 Data Signal Routing
71 -------------------
72
73 For one bit of intensity, two bits per colour channel:
74
75 D7 -> 2200R -> I
76
77 I -> diode -> R
78 I -> diode -> G
79 I -> diode -> B
80
81 D6 (not connected)
82
83 D5 -> 470R -> R
84 D4 -> 1000R -> R
85 D3 -> 470R -> G
86 D2 -> 1000R -> G
87 D1 -> 470R -> B
88 D0 -> 1000R -> B
89
90 HSYNC -> HS
91 VSYNC -> VS
92
93 Output Socket Pinout
94 --------------------
95
96 5 (GND) 4 (NC) 3 (B) 2 (G) 1 (R)
97
98 10 (GND) 9 (NC) 8 (GND) 7 (GND) 6 (GND)
99
100 15 (NC) 14 (VS) 13 (HS) 12 (NC) 11 (NC)
101
102 Output Cable Pinout
103 -------------------
104
105 1 (R) 2 (G) 3 (B) 4 (NC) 5 (GND)
106
107 6 (GND) 7 (GND) 8 (GND) 9 (NC) 10 (GND)
108
109 11 (NC) 12 (NC) 13 (HS) 14 (VS) 15 (NC)
110
111 References
112 ----------
113
114 https://en.wikipedia.org/wiki/VGA_connector
115
116 http://papilio.cc/index.php?n=Papilio.VGAWing
117
118 http://lucidscience.com/pro-vga%20video%20generator-2.aspx
119
120 https://sites.google.com/site/h2obsession/CBM/C128/rgbi-to-vga