# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1496509989 -7200
# Node ID e3ec1c594d8e4a7325729a0dd996b007b7541e8f
# Parent  a3173748352c1462371e4fbcec095163eb55590c
Simplified the interrupt handler slightly.

diff -r a3173748352c -r e3ec1c594d8e vga.S
--- a/vga.S	Sat Jun 03 16:26:10 2017 +0200
+++ b/vga.S	Sat Jun 03 19:13:09 2017 +0200
@@ -711,6 +711,11 @@
 	beqz $v1, irq_dma
 	nop
 
+	/* Clear the timer interrupt condition. */
+
+	li $v1, (1 << 9)	/* IFS0<9> = T2IF = 0 */
+	sw $v1, CLR($v0)
+
 	/* Increment the line counter. */
 
 	addiu $s0, $s0, 1
@@ -720,16 +725,7 @@
 	jalr $s1
 	nop
 
-irq_clear_timer:
-
-	/* Clear the timer interrupt condition. */
-
-	la $v0, IFS0
-	li $v1, (1 << 9)	/* IFS0<9> = T2IF = 0 */
-	sw $v1, CLR($v0)
-
 irq_dma:
-
 	/* Check for a DMA interrupt condition. */
 
 	la $v0, IFS1
@@ -739,12 +735,17 @@
 	beqz $v1, irq_exit
 	nop
 
+	/* Clear the DMA interrupt condition. */
+
+	li $v1, (1 << 28)	/* IFS1<28> = DMA0IF = 0 */
+	sw $v1, CLR($v0)
+
 	/* Test the block transfer completion interrupt flag. */
 
 	la $v0, DCH0INT
 	lw $v1, 0($v0)
 	andi $v1, $v1, (1 << 3)	/* CHBCIF */
-	beqz $v1, irq_clear_dma
+	beqz $v1, irq_exit
 	nop
 
 	/* Clear the block transfer completion interrupt flag. */
@@ -758,7 +759,7 @@
 	*/
 
 	andi $t8, $s0, 1
-	bnez $t8, irq_clear_dma
+	bnez $t8, irq_exit
 	nop
 
 	/* Reference the next line and update the DMA source address. */
@@ -794,14 +795,6 @@
 	la $v0, DCH0CON
 	sw $v1, SET($v0)
 
-irq_clear_dma:
-
-	/* Clear the DMA interrupt condition. */
-
-	la $v0, IFS1
-	li $v1, (1 << 28)	/* IFS1<28> = DMA0IF = 0 */
-	sw $v1, CLR($v0)
-
 irq_exit:
 	/* Save state. */