1.1 --- a/vga.S Tue May 30 00:12:14 2017 +0200
1.2 +++ b/vga.S Sat Jun 03 12:56:58 2017 +0200
1.3 @@ -778,9 +778,22 @@
1.4
1.5 irq_dma_update:
1.6
1.7 + /* Disable line channel. */
1.8 +
1.9 + la $v0, DCH0CON
1.10 + li $v1, 0b10000000
1.11 + sw $v1, CLR($v0)
1.12 +
1.13 + /* Update the source address. */
1.14 +
1.15 la $v0, DCH0SSA
1.16 sw $s2, 0($v0)
1.17
1.18 + /* Enable line channel. */
1.19 +
1.20 + la $v0, DCH0CON
1.21 + sw $v1, SET($v0)
1.22 +
1.23 irq_clear_dma:
1.24
1.25 /* Clear the DMA interrupt condition. */