1.1 --- a/display.c Sun May 28 19:11:01 2017 +0200
1.2 +++ b/display.c Sun May 28 22:02:02 2017 +0200
1.3 @@ -23,7 +23,7 @@
1.4
1.5 void init_framebuffer(uint32_t *data)
1.6 {
1.7 - uint32_t *addr = (uint32_t *) KSEG0_BASE;
1.8 + uint32_t *addr = (uint32_t *) SCREEN_BASE_KSEG0;
1.9 uint16_t x, y;
1.10
1.11 for (y = 0; y < LINE_COUNT; y++)
1.12 @@ -39,7 +39,7 @@
1.13
1.14 void init_framebuffer_with_pattern()
1.15 {
1.16 - uint32_t *addr = (uint32_t *) KSEG0_BASE;
1.17 + uint32_t *addr = (uint32_t *) SCREEN_BASE_KSEG0;
1.18 uint32_t base, value;
1.19 uint16_t x, y;
1.20 uint8_t row, offset;
2.1 --- a/vga.S Sun May 28 19:11:01 2017 +0200
2.2 +++ b/vga.S Sun May 28 22:02:02 2017 +0200
2.3 @@ -140,8 +140,16 @@
2.4
2.5 li $s0, 0 /* line counter */
2.6 la $s1, vbp_active /* current event */
2.7 - move $s2, $zero /* line address */
2.8 - move $s3, $zero /* screen address */
2.9 + li $s2, SCREEN_BASE /* line address */
2.10 + li $s3, SCREEN_BASE /* screen address */
2.11 +
2.12 + /* Save the state for retrieval in the interrupt handler. */
2.13 +
2.14 + li $k0, IRQ_STACK_LIMIT
2.15 + sw $s0, -44($k0)
2.16 + sw $s1, -48($k0)
2.17 + sw $s2, -52($k0)
2.18 + sw $s3, -56($k0)
2.19
2.20 /* Enable interrupts and loop. */
2.21
2.22 @@ -482,7 +490,8 @@
2.23 */
2.24
2.25 la $v0, DCH0SSA
2.26 - sw $zero, 0($v0)
2.27 + li $v1, SCREEN_BASE
2.28 + sw $v1, 0($v0)
2.29
2.30 /*
2.31 For the reset channel, a single byte of zero is transferred:
2.32 @@ -631,6 +640,28 @@
2.33
2.34 interrupt_handler:
2.35
2.36 + /* Store affected registers. */
2.37 +
2.38 + li $k0, IRQ_STACK_LIMIT
2.39 + sw $v0, -4($k0)
2.40 + sw $v1, -8($k0)
2.41 + sw $s0, -12($k0)
2.42 + sw $s1, -16($k0)
2.43 + sw $s2, -20($k0)
2.44 + sw $s3, -24($k0)
2.45 + sw $t8, -28($k0)
2.46 + sw $ra, -32($k0)
2.47 + sw $sp, -36($k0)
2.48 +
2.49 + /* Load state. */
2.50 +
2.51 + lw $s0, -44($k0)
2.52 + lw $s1, -48($k0)
2.53 + lw $s2, -52($k0)
2.54 + lw $s3, -56($k0)
2.55 +
2.56 + li $sp, IRQ_STACK_TOP
2.57 +
2.58 /* Check for a timer interrupt condition. */
2.59
2.60 la $v0, IFS0
2.61 @@ -695,14 +726,14 @@
2.62
2.63 /* Test for wraparound. */
2.64
2.65 - li $t8, SCREEN_SIZE
2.66 + li $t8, (SCREEN_BASE + SCREEN_SIZE)
2.67 sltu $t8, $s2, $t8
2.68 bnez $t8, irq_dma_update
2.69 nop
2.70
2.71 /* Reset the source address. */
2.72
2.73 - move $s2, $zero
2.74 + li $s2, SCREEN_BASE
2.75
2.76 irq_dma_update:
2.77
2.78 @@ -718,6 +749,26 @@
2.79 sw $v1, CLR($v0)
2.80
2.81 irq_exit:
2.82 + /* Save state. */
2.83 +
2.84 + li $k0, IRQ_STACK_LIMIT
2.85 + sw $s0, -44($k0)
2.86 + sw $s1, -48($k0)
2.87 + sw $s2, -52($k0)
2.88 + sw $s3, -56($k0)
2.89 +
2.90 + /* Restore affected registers. */
2.91 +
2.92 + lw $v0, -4($k0)
2.93 + lw $v1, -8($k0)
2.94 + lw $s0, -12($k0)
2.95 + lw $s1, -16($k0)
2.96 + lw $s2, -20($k0)
2.97 + lw $s3, -24($k0)
2.98 + lw $t8, -28($k0)
2.99 + lw $ra, -32($k0)
2.100 + lw $sp, -36($k0)
2.101 +
2.102 eret
2.103 nop
2.104
3.1 --- a/vga.h Sun May 28 19:11:01 2017 +0200
3.2 +++ b/vga.h Sun May 28 22:02:02 2017 +0200
3.3 @@ -1,19 +1,25 @@
3.4 #ifndef __VGA_H__
3.5 #define __VGA_H__
3.6
3.7 -#define LINE_LENGTH 160 /* pixels */
3.8 -#define LINE_COUNT 256 /* distinct display lines */
3.9 +#define LINE_LENGTH 160 /* pixels */
3.10 +#define LINE_COUNT 256 /* distinct display lines */
3.11
3.12 -#define HFREQ_LIMIT 643 /* 24MHz cycles */
3.13 -#define HSYNC_START 460 /* 24MHz cycles */
3.14 -#define HSYNC_LIMIT 64 /* 24MHz cycles */
3.15 +#define HFREQ_LIMIT 643 /* 24MHz cycles */
3.16 +#define HSYNC_START 460 /* 24MHz cycles */
3.17 +#define HSYNC_LIMIT 64 /* 24MHz cycles */
3.18 #define HSYNC_END (HSYNC_START + HSYNC_LIMIT)
3.19
3.20 -#define VISIBLE_START 70 /* horizontal lines, back porch end */
3.21 +#define VISIBLE_START 70 /* horizontal lines, back porch end */
3.22 #define VFP_START (VISIBLE_START + 2 * LINE_COUNT)
3.23 -#define VSYNC_START 620 /* horizontal lines, front porch end */
3.24 -#define VSYNC_END 622 /* horizontal lines, back porch start */
3.25 +#define VSYNC_START 620 /* horizontal lines, front porch end */
3.26 +#define VSYNC_END 622 /* horizontal lines, back porch start */
3.27
3.28 +#define SCREEN_BASE 256
3.29 #define SCREEN_SIZE (40 * 1024)
3.30
3.31 +#define SCREEN_BASE_KSEG0 (KSEG0_BASE + SCREEN_BASE)
3.32 +
3.33 +#define IRQ_STACK_LIMIT SCREEN_BASE_KSEG0
3.34 +#define IRQ_STACK_TOP (IRQ_STACK_LIMIT - 56)
3.35 +
3.36 #endif /* __VGA_H__ */