VGAPIC32

Changeset

92:c9ec1da2c3ca
2017-11-20 Paul Boddie raw files shortlog changelog graph Enable and disable the DMA channel rather than changing IRQ settings. snapshot-20171120
vga.S (file)
     1.1 --- a/vga.S	Mon Nov 20 22:14:55 2017 +0100
     1.2 +++ b/vga.S	Mon Nov 20 22:24:56 2017 +0100
     1.3 @@ -530,12 +530,10 @@
     1.4  	occurs:
     1.5  	DCHxECON<15:8> = CHSIRQ<7:0> = timer 2 interrupt
     1.6  	DCHxECON<4> = SIRQEN = 1
     1.7 -
     1.8 -	For now, however, prevent initiation by not setting SIRQEN.
     1.9  	*/
    1.10  
    1.11  	la $v0, DCH0ECON
    1.12 -	li $v1, (9 << 8)
    1.13 +	li $v1, (9 << 8) | (1 << 4)
    1.14  	sw $v1, 0($v0)
    1.15  
    1.16  	/*
    1.17 @@ -643,11 +641,7 @@
    1.18  	li $v1, (1 << 28)	/* IEC1<28> = DMA0IE = 1 */
    1.19  	sw $v1, SET($v0)
    1.20  
    1.21 -	/* Enable line channel. */
    1.22 -
    1.23 -	la $v0, DCH0CON
    1.24 -	li $v1, 0b10000000
    1.25 -	sw $v1, SET($v0)
    1.26 +	/* Enable line channel later. */
    1.27  
    1.28  	jr $ra
    1.29  	nop
    1.30 @@ -858,8 +852,8 @@
    1.31  
    1.32  	/* Enable the line channel for timer event transfer initiation. */
    1.33  
    1.34 -	la $v0, DCH0ECON
    1.35 -	li $v1, (1 << 4)	/* DCH0ECON<4> = SIRQEN = 1 */
    1.36 +	la $v0, DCH0CON
    1.37 +	li $v1, (1 << 7)
    1.38  	sw $v1, SET($v0)
    1.39  
    1.40  _vbp_active_ret:
    1.41 @@ -883,8 +877,8 @@
    1.42  
    1.43  	/* Disable the line channel. */
    1.44  
    1.45 -	la $v0, DCH0ECON
    1.46 -	li $v1, (1 << 4)	/* DCH0ECON<4> = SIRQEN = 0 */
    1.47 +	la $v0, DCH0CON
    1.48 +	li $v1, (1 << 7)
    1.49  	sw $v1, CLR($v0)
    1.50  
    1.51  _visible_active_ret: